This invention relates to methods for managing peak power levels in memory systems, in particular, memory systems that allow parallel operations with respect to multiple memory array (e.g., multi-die and/or multi-die memory systems).
Memory systems generally include multiple components which are in communication with each other and perform different functions as part of an overall system. One example of such a memory system is a nonvolatile memory system. Nonvolatile memory systems are used in various applications. Some nonvolatile memory systems are embedded in a larger system such as a personal computer. Other nonvolatile memory systems are removably connected to a host system and may be interchanged between different host systems. Examples of such removable memory systems (removable memory units) include memory cards and USB flash drives. Electronic circuit cards, including non-volatile memory cards, have been commercially implemented according to a number of well-known standards. Memory cards are used with personal computers, cellular telephones, personal digital assistants (PDAs), digital still cameras, digital movie cameras, portable audio players and other host electronic devices for the storage of large amounts of data. Such cards usually contain a re-programmable non-volatile semiconductor memory cell array along with a controller that controls and supports operation of the memory cell array and interfaces with a host to which the card is connected. Memory card standards include PC Card, CompactFlash™ card (CF™ card), SmartMedia™ card, MultiMediaCard (MMC™), Secure Digital (SD) card, a miniSD™ card, microSD™ card, Memory Stick™, Memory Stick Duo card and microSD/TransFlash™ memory module standards, by way of a few examples. There are several USB flash drive products commercially available from SanDisk Corporation under its trademark “Cruzer®.” Other examples of removable memory units include Solid State Drives (SSDs), e.g. using SATA, PCle, ExpressCard or similar standards. SSDs use solid state memory systems in applications where Hard Disk Drives have traditionally been used, such as in laptop computers.
A solid state drive (SSD) is designed to provide reliable and high performance storage of user data across a flash-based memory system containing a host interface controller (such as a Serial Advanced Technology Attachment (SATA)) interface) and a number of memory multi-chip packages (MCPs), where each MCP contains a flash memory controller and a stack of NAND flash dies. The Open NAND Flash Interface (ONFI) protocol provides support for parallel access to multiple NAND dies (or “logical units” (LUNs)) on a single “target” or NAND multi-chip stack on a single shared ONFI channel. In a typical SAT A-based SSD application, a central host controller accesses multiple attached devices (targets/NAND device clusters) on each ONFI channel, and across several ONFI channels. Each ONFI target typically controls 2, 4, or 8 NAND dies. Storage management software running on the host controller manages a virtual memory space that is mapped to flash blocks in the physical dies in each of the attached MCP's.
In many memory systems, storage management software running on the host controller manages a virtual memory space that is mapped to flash blocks in the physical dies in each of the attached MCP's. The host controller and the storage management software utilize parallel access and efficient usage of the available flash devices to optimize SSD drive performance, endurance, and cost. The system often must achieve these optimizations within product-related or technology-related power, which is often set forth in the specifications for the product. For example, in some SSD assemblies, the SSD assembly must not exceed 10 W peak power consumption under any operational mode.
Different techniques have been used to manage power within required limits. For example, the host can employ a host-initiated power management/power-down (HIPM/HIPD) technique in which the host de-powers some number of target modules or directs them to enter a standby/power-down mode. In this way, the host reduces traffic to some number of devices. Improved power management in non-volatile memory systems would be beneficial.